The Sipeed Tang Nano 9K is a powerful FPGA development board designed around the Gowin GW1NR-9 chip. This versatile board is ideal for various FPGA projects, including implementing RISC-V softcores like PicoRV. It features 8640 LUT4 logic units, making it capable of handling complex digital designs. The board includes a variety of display interfaces, such as HDMI, SPI, and RGB, allowing for a wide range of display applications.
With 32Mbit SPI flash memory and an onboard 27MHz clock supplemented by 2 PLLs, the Tang Nano 9K supports both high-speed and low-power applications. The board is developed using the Gowin IDE, which supports general hardware description languages and provides comprehensive tools for FPGA development, including IP core generation and code synthesis.
The Tang Nano 9K also includes a TF card slot, 2x24P 2.54mm header pads, 2 programmable buttons, and 6 programmable LEDs, providing ample flexibility for expansion and customization. The onboard BL702 chip offers USB-JTAG and USB-UART functions, facilitating easy debugging and programming. Featured By RoboticsBD.
Product Images are shown for illustrative purposes only and may differ from the actual product.
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Features:
- Powerful FPGA Chip: Utilizes Gowin GW1NR-9 with 8640 LUT4 logic units.
- Display Interfaces: HDMI, RGB, and SPI screen interfaces for versatile display options.
- High Capacity Memory: Includes 32Mbit SPI flash and 64M SDR SDRAM.
- Comprehensive Development Environment: Supports Gowin IDE for easy development and deployment.
- Onboard Debugging: Features BL702 chip for USB-JTAG and USB-UART functions.
- Expandable and Customizable: Equipped with header pads, programmable buttons, and LEDs.
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Applications:
- FPGA Development: Suitable for advanced digital designs, including RISC-V softcores.
- Prototyping and Testing: Ideal for testing hardware designs and debugging.
- Educational Projects: A valuable tool for learning FPGA and hardware description languages.
- Embedded Systems: Can be used in embedded systems requiring FPGA.
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| General Specifications |
| FPGA Chip | Gowin GW1NR-9 |
| Logic Units (LUT4) | 8640 |
| Registers (FF) | 6480 |
| ShadowSRAM SSRAM | 17280 bits |
| Block SRAM BSRAM | 468K bits (26 blocks) |
| User Flash | 608K bits |
| SDR SDRAM | 64M bits |
| 18 x 18 Multiplier | 20 |
| SPI Flash | 32M-bit |
| PLL | 2 |
| Display Interfaces | HDMI, SPI, RGB |
| Debugger | BL702 chip for USB-JTAG, USB-UART |
| IO | Supports various driving capabilities and options |
| Connectors | TF card slot, 2x24P 2.54mm header pads |
| Buttons | 2 programmable |
| LEDs | 6 programmable |
| Shipping Weight | 0.048 kg |
| Shipping Dimensions | 9 × 6 × 4 cm |
Please allow 5% measuring deviation due to manual measurement.
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Documentation:
- Manufacturer's Wiki
Package Includes:
1 x Sipeed Tang Nano 9K FPGA Development Board
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